Answering my own question<br>The eVC compiler does not optomise for shifts on source rgisters when compiling ARM code<br>a=b+(c<<8)<br>compiles to:<br>mov r1, r2, lsl #8<br>add r3, r0, r1<br><br>As opposed to:<br>add r3,r0,r2 lsl #8<br>hmmm bad Microsoft
<br>BTW<br>it would not be too difficult to go through by hand and correct this by hand for anyone doing an amount of fixed point maths thats using alot of shifting.<br>The same is true for the indexd addressing on LDR/STR<br>LDR r0,[r2,r3 lsr #2]<br>omg im sad but i just love the code.<br>