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PostPosted: Aug 28, 2005 @ 3:34am
by kornalius

PostPosted: Aug 28, 2005 @ 6:58am
by refractor

PostPosted: Aug 29, 2005 @ 1:00am
by kornalius

PostPosted: Aug 29, 2005 @ 6:20am
by refractor

PostPosted: Aug 29, 2005 @ 2:35pm
by kornalius
Your code seems to work well so far. Thanks.

Btw, how do you do a divide in assembly (ARM)? There are ADD, SUB and MUL operator but I didn't see a DIV.

PostPosted: Aug 29, 2005 @ 2:48pm
by refractor
There isn't one (it's a RISC chip, after all ;)). Start <a href="http://www.pocketmatrix.com/forums/viewtopic.php?t=11940&start=0">here</a>, maybe (or just look at what C does to perform a divide).

PostPosted: Aug 30, 2005 @ 12:31am
by kornalius

PostPosted: Aug 30, 2005 @ 6:39pm
by joshbu [MSFT]

PostPosted: Aug 30, 2005 @ 7:09pm
by kornalius

PostPosted: Aug 31, 2005 @ 12:21am
by kornalius
The mov instruction I have implemented is quite complex. It supports many varieties of addressing:

mov r0, r1
mov r0, 0x3AF
mov r0, [r1]
mov r0, [r1, 8]
mov [r0], r1
mov [r0, 8], 10
mov r0, [pplvar$]
mov [pplvar$], 10
mov [pplvar$, 8], 10

I made the mov and push quite complete, except the other operators are simpler, like add, sub ... For sure I had to add some opcodes underneath some of the mov'es addressing.

The push works transparently for ARM or Intel. On ARM is uses the r0-r3 before starting to push on the stack.