ARM asm optimizations
Posted: Dec 11, 2003 @ 12:07pmHey,
I'm looking for some help optimizing my inner loop for affine tmapper.
It looks and works pretty nicely, but I have got 2 points where it could be possibly improved.
1.Is there an instruction to improve loops like:
loop start
....
decrease parameter by 1
jump if parameter is !=0
in asm:
loop
...
subs r0,r0,#1
bge loop
In tmapper I have to repear my inner loop x times, can it be handled nicer, without the additional "decrease register by 1" instruction?
any ideas how I could possibly replace it to have one instruction less?
2.I have got something like
add r1,r1,r3 lsl #1
ldrh r6,[r1]
I would like to put it as
ldrh r6,[r1,r3,lsl #1]
but EVC++3.0 doesn't allow me to compile it...
ldr r6,[r1,r3,lsl #1] is fine...?
what's wrong with it? Can I somehow use it (again to have one less instruction in inner loop:)
Thanks for your time
I'm looking for some help optimizing my inner loop for affine tmapper.
It looks and works pretty nicely, but I have got 2 points where it could be possibly improved.
1.Is there an instruction to improve loops like:
loop start
....
decrease parameter by 1
jump if parameter is !=0
in asm:
loop
...
subs r0,r0,#1
bge loop
In tmapper I have to repear my inner loop x times, can it be handled nicer, without the additional "decrease register by 1" instruction?
any ideas how I could possibly replace it to have one instruction less?
2.I have got something like
add r1,r1,r3 lsl #1
ldrh r6,[r1]
I would like to put it as
ldrh r6,[r1,r3,lsl #1]
but EVC++3.0 doesn't allow me to compile it...
ldr r6,[r1,r3,lsl #1] is fine...?
what's wrong with it? Can I somehow use it (again to have one less instruction in inner loop:)
Thanks for your time