ATI Imageon and e740

[Dustobub]

[James S]

I kept telling all of you that it wasn't anything to do with the ATI graphics thing that was slowing down the XScale. There's a news article on Slashdot.org with a link in it to a thread on PocketPCThoughts.com in which a Microsoft representative reveals that Microsoft didn't want to support the new processor because that meant that the old ARM processors would become obsolete just like MIPS. XScale uses ARM V5 instruction sets and attemptes to emulate some ARM V4. The SA1110 ARM uses ARM V4 instruction sets and Microsoft is sticking to those.

[Digby]

The ARMV5TE instruction set implemented on the XScale chips is a superset of the ARMV4 instruction set used by the StrongARM. There are additional instructions in XScale to do things like preload the data cache, and perform some DSP math ops like saturated arithmetic. The core instructions to load/store registers, add, subtract, multiply, branch, etc. are all the same. The number of registers is also the same in both chips.

If the time it takes to load a register from main memory takes twice as long on the XScale, I don't know what you can do about it other than reducing the number of times you do the operation, or by rewriting your code to make better use of the data cache. Either one of those strategies would directly benefit the StrongARM as well.

Saying that things will get better with a new OS would be true for apps that relied on the OS to do things like move memory blocks around. Ask Dan East how much games like Quake rely on the OS APIs for their performance. They don't. The majority of a game is math ops and memory accesses, and a new OS isn't going to do much to speed that up.

[James S]

Well, hey, that's what the Microsoft Representative said on PocketPCThoughts. That they don't support the V5 instruction sets and that that is the problem with XScale because it emulates V4 instructions. Don't look at me.

But if anyone has looked at the technical details of the XScale processor you'll notice that it has 12 steps/stages in the instruction pipeline. That's a hell of a lot, I'm told, for 400MHz. The AMD 1GHz only has, what, 8, 10 steps? That's why it's faster than the Pentium4 1GHz which has 16,18 steps. The more steps it goes through when decoding the instructions the more time it takes, and on a low speed CPU like the 400MHz XScale 12 steps is like an Interstate with traffic lights.

[Digby]

Moose,

If you're referring to interview, then I see nothing where the MS representative mentions anything about emulating ARMV4 instructions. Was there another interview where he said that? If so, post the link please.

[accolon]

Yeah, that's the interview he's referring to.

PocketPCThoughts.com seems to be down all the time, but the comments on support Moose's statement.

[Guest]

[eminefes]

[jadam1]

[eminefes]

[jadam1]

[James S]

[ralph55]

[BurningSheep]

i think someone is a bit confused... and should have posted here:

[refractor]